degate  0.1.2
VerilogCodeTemplateGenerator.h
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00001 /* -*-c++-*-
00002 
00003  This file is part of the IC reverse engineering tool degate.
00004 
00005  Copyright 2008, 2009, 2010 by Martin Schobert
00006 
00007  Degate is free software: you can redistribute it and/or modify
00008  it under the terms of the GNU General Public License as published by
00009  the Free Software Foundation, either version 3 of the License, or
00010  any later version.
00011 
00012  Degate is distributed in the hope that it will be useful,
00013  but WITHOUT ANY WARRANTY; without even the implied warranty of
00014  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015  GNU General Public License for more details.
00016 
00017  You should have received a copy of the GNU General Public License
00018  along with degate. If not, see <http://www.gnu.org/licenses/>.
00019 
00020 */
00021 
00022 #ifndef __VERILOGCODETEMPLATEGENERATOR_H__
00023 #define __VERILOGCODETEMPLATEGENERATOR_H__
00024 
00025 #include <degate.h>
00026 #include <memory>
00027 #include <cctype>
00028 
00029 #include <CodeTemplateGenerator.h>
00030 #include <boost/foreach.hpp>
00031 
00032 namespace degate {
00033 
00034 
00035   /**
00036    * A code template generator for Verilog.
00037    */
00038 
00039   class VerilogCodeTemplateGenerator : public CodeTemplateGenerator {
00040   public:
00041 
00042     VerilogCodeTemplateGenerator(std::string const& entity_name,
00043                                  std::string const& description,
00044                                  std::string const& logic_class = "");
00045 
00046     virtual ~VerilogCodeTemplateGenerator();
00047 
00048     virtual std::string generate() const;
00049 
00050     typedef std::map<std::string, std::string> port_map_type;
00051 
00052   protected:
00053 
00054     virtual std::string generate_header() const;
00055     virtual std::string generate_common() const;
00056 
00057     virtual std::string generate_port_list() const;
00058     virtual std::string generate_port_definition() const;
00059 
00060     virtual std::string generate_module(std::string const& entity_name,
00061                                         std::string const& port_description = "") const;
00062 
00063 
00064 
00065     virtual std::string generate_impl(std::string const& logic_class = "") const;
00066 
00067     /**
00068      * Generate a Verilog complient identifier from a string.
00069      *
00070      * Verilog identifier:
00071      *
00072      * - Must begin with alphabetic characters (a-z or A-Z)
00073      * - Can contain alphanumeric (a-z, A-Z, 0-9) or underscore (_) characters
00074      * - Can be up to 1024 characters long
00075      * - Cannot contain white space
00076      * - are not case sensitive.
00077      */
00078     virtual std::string generate_identifier(std::string const& name,
00079                                             std::string const& prefix = "") const;
00080 
00081 
00082     using CodeTemplateGenerator::generate_identifier;
00083   };
00084 
00085   typedef std::shared_ptr<VerilogCodeTemplateGenerator> VerilogCodeTemplateGenerator_shptr;
00086 
00087 }
00088 
00089 #endif