PacSec 2009

Here are the files and tools that were presented by Karsten Nohl in his talk "Silicon Chips: No More Secrets" at PacSec 2009.

Image stitching

Source code:
Author: Sven Kaden
Licence: GPL V3

Test images: [1] [2] [3] (first row, from left to right); [1] [2] [3] (second row, from left to right)

screenshot screenshot screenshot

Gate drawer

Source code:
Authors: Stefan Skillen and Daniel Wittekind
Licence: GPL V3

You need these two jar files: org-netbeans-api-visual.jar and org-openide-util.jar in order to compile and run the gate drawer tool. Both jar files are from the Netbeans project and are licenced under CDDL.


Edge detection test suite

Source code:
Author: Christin Schulz
Licence: GPL V3

Legic's logic model

The gate library specifies, which type of gates exists. You may want to check this page. It shows functions and images of all gate types. In the XML file gates have a parameter "name". This refers to the "ID" on the web page. The logic model describes which gate ports are connected and where the gates are placed.